Compare CISC and RISC in Tabular Form

Sno.	Complex Instruction Set Computer (CISC)	Reduced Instruction Set Computer (RISC)
1.	CISC Instructions with variable formats.	RISC Instruction with fixed format and almost register based Instruction.
2.	No. of Instructions 120 to 350.	No. of Instructions less than 100.
3.	CPU control mostly hardwired without control memory.	Mostly microcoded using control memory but modern CISC also uses hardwired control.
4.	Large set of instructions with variable formats(16-64 bits per instruction).	Small set of instructions with fixed (32-bit) format and most register-based instructions.
5.	8-24 GPRs(General Purpose Resisters), mostly with a unified cache for instructions and data, recent designs also use split caches.	Large numbers (32 – 192) ot GPRs(General Purpose Registers) with mostly split datd cache and instruction cache.
6.	Not register based instructions	Register based instructions
7.	More memory access	Less memory access
8.	Emphasis on hardware	Emhasis on software
9.	Includes multi-clock	Single-clock
10.	Complex Instructions In CISC	Reduced instruction In RISC
11.	Memory-to-memory	Register to register
12.	“LOAD” and “STORE” incorporated in instructions	“LOAD”and “STORE” are indipendent instructions
13.	Small code sizes	Large code sizes
14.	CISC	RISC